This invention relates to a current-mirror arrangement comprising a first transistor whose emitter is coupled to a voltage source and whose collector and base are coupled to a junction point for the application of an input current, and at least a second transistor whose emitter is coupled to the voltage source, whose base is coupled to the base of the first transistor, and whose collector constitutes the output for supplying an output current.
Such a current-mirror arrangement is known, for example from the book by Jovan Antula, "Schaltungen zur Mikroelektronik", Oldenbourg-Verlag, 1984, pages 56 to 59. The function of a current-mirror arrangement is to generate an output current which is in a fixed ratio to the input current. As is known, a current-mirror arrangement has a low input resistance and a high output resistance. Under load the output current therefore changes only to a very small extent. Further, such an arrangement is largely independent of temperature influences.
In the known arrangement the input current is substantially equal to the output current for high d.c. gain factors. The symmetry error of the current-mirror arrangement, which is caused by the base currents of the two transistors, is almost negligible for high d.c. gain factors.
Current-mirror arrangements are mainly used in integrated circuits. The following problem may then occur when PNP transistors are used. The current gain depends essentially on the emitter area of a PNP transistor. A change in emitter area means a change in current gain. In the fabrication of integrated circuits which comprise at least one current-mirror arrangement formed with PNP transistors, the spread between devices may be such that symmetry errors are no longer negligible.